Orange Tree Technologies has launched a new addition to its product family, the ZestETM1, a high performance Gigabit Ethernet TCP/IP offload engine (TOE) module.
According to Charles Sweeney, Hardware Director at the company, “With the increasing use of Ethernet in many different markets such as industrial control, machine vision, defence and the medical sector, the ZestETM1 is intended to speed the time to market for many companies, creating a key advantage for them”.
With the proprietary protocol chip GigExpedite handling the whole TCP/IP stack at over 100MBytes/sec in each direction, and the module measuring just 25 x 30mm, the module allows the user”s embedded processor or FPGA to be dedicated entirely in the search for maximum efficiency.
TCP/IP at Gigabit speed consumes considerable processing power, and using a separate dedicated TCP/IP engine frees up the embedded processor or FPGA for the application’s function. The added benefit of this is that a smaller and lower cost processor can be used for the main application.
Matt Bowen, Software Director at Orange Tree said “We based the design of GigExpedite on the TCP/IP engine of our current product ZestET1. This was following feedback from customers who wanted to use their own embedded processor instead of the FPGA on ZestET1. The new product design has therefore been shaped by over 4 years’ practical user experience”.
The ZestETM1 offers application designers and companies a simple ready-to-go high speed Ethernet data interface solution, saving them the headache of having to get to grips with the complexity of TCP/IP or creating their own Ethernet interface.
Designed to be highly adaptable, the ZestETM1 interface can be configured to one of four modes: 8 or 16-bit SRAM-style bus, FIFO, or “bit banging”. The SRAM-style bus modes are similar to an SRAM interface with the application writing and reading ZestETM1. The FIFO mode has two separate 8-bit channels streaming in each direction to and from ZestETM1. The innovative “bit-banging” mode enables another device on the network to write or read up to 32-bit values to or from an attached device.
There is also a low speed serial interface, which can be configured as either an SPI slave or a UART. This allows a low performance processor to control ZestETM1 while the high speed data interface is connected to the application data path such as FPGA, ADC, DAC or bus transceivers. A separate SPI master interface can be used, for example to configure an attached FPGA or processor.
The TCP/IP engine in GigExpedite runs at 10/100/1000 MBits/sec and delivers over 100MBytes/sec sustained in each direction. It implements the following protocols: TCP/IP, UDP, ARP, IPv4, ICMP, IGMP, PTP and HTTP. For real-time applications, Precision Time Protocol (PTP) and SyncE offer time of day and a 125MHz clock synchronised across the network to other network devices.