Xilinx ships world’s first heterogeneous 3D FPGA

Using SSI technology enables Xilinx to deliver not only high-capacity devices built on TSMC’s 28nm high performance/low power process, but also an increased number of transceivers to enhance system performance. According to Xilinx competing monolithic FPGAs are only able to integrate a fourth of the number of 28 Gbps channels. The heterogeneous implementation of Virtex-7 HT devices also enables Xilinx to make independent technology choices for the core FPGA and 28 Gbps transceiver die, which avoids burdening the FPGA with high leakage transistors that waste system power and bring no benefit to computation tasks. Having 28 Gbps transceivers on silicon separate from the core FPGA fabric further allows for superior noise isolation, enabling best overall signal integrity and system margin, as well as improved productivity for design closure and faster time to market.

Effectively upgrading networks to handle exponential growth in data usage is critical to the communications industry. This requires power and port density improvements in optical modules while reducing cost per bit. Driven by the migration to CFP2 and, in the future, CFP4 optical modules, Virtex-7 HT devices enable unprecedented integration capability for communication equipment vendors designing Nx100G and 400G line cards.

“With eight 28 Gbps transceivers and ample logic capacity, the Virtex-7 H580T device can integrate additional line card functionality so that designers can implement a dual 100G OTN transponder on a single chip,” said Mark Gustlin, System Architect for Wired Communications at Xilinx. “Competing ASSP-based solutions will comprise five devices, will remain unavailable for more than a year, will consume at least 40 percent additional power and will cost 50 percent more.”

Virtex-7 HT devices with their 28 Gbps transceivers can support up to four IEEE 100GE gearboxes in a single device with the option of integrating advanced debug capabilities, OTN, MAC or Interlaken IP within the same FPGA, eliminating the need for separate gearbox and ASSP devices. The upcoming Virtex-7 H870T device is also 400GE ready and will be able to support future 400GE modules that require16x25 Gbps interfaces. The result is reduced overall power and BOM cost and a more flexible solution in the midst of changing protocols.

Xilinx

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