Xilinx has announced three major milestones in the execution and introduction of its next generation 20nm All Programmable Devices. The 20nm portfolio builds upon Xilinx breakthroughs proven at 28nm to provide an extra generation of system performance, lower power and programmable system integration. The 20nm portfolio will address a wide range of next generation systems and provides the most compelling programmable alternative ever to ASICs and ASSPs.
“Xilinx went ‘all in’ to move a generation ahead at 28nm, and is doing the same at 20nm to stay a generation ahead. We are on a very aggressive path to deliver our next generation design tools and devices into the hands of our customers,” said Victor Peng, senior vice president, Programmable Platform Group at Xilinx.
The Xilinx Vivado Design Suite, the first SoC strength design suite for programmable devices, will support initial 20nm devices in March 2013. At 20nm, the design suite will further accelerate time to integration and implementation by 4x as well as deliver up to 50 percent power reduction and three speed grades of performance improvement.
In the second quarter of 2013, Xilinx will tape out its first 20nm product on TSMC’s 20SoC manufacturing process and will be readying device samples this year for strategic customers who can begin implementing next-generation applications. Xilinx optimised its 20nm All Programmable portfolio to address the requirements of ever smarter, highly integrated, bandwidth hungry systems in wired and wireless networks, data centers, vision based systems, and other high performance applications.
Xilinx is currently engaging with the first ten customers on 20nm architecture evaluations and implementation activities. With availability of documentation since November 2012, Xilinx has been working closely with an increasing number of strategic customers doing early design work. With the upcoming availability of design tools this quarter, the level of design activity will grow significantly.