The chip entered mass production earlier this month and Toshiba and its technology partner, SanDisk, unveiled its key technology advances at the International Solid State Circuits Conference (ISSCC) in San Francisco, California.
Manufacturers of NAND flash memories are looking to respond to demand for higher densities at competitive costs for such applications as USB memories and memory cards. Toshiba looks to have achieved both through the application of new innovative technologies.
The new 3-bit-per-cell 19nm generation device uses the three-step programming algorithm and air-gap technology for transistors, effectively reducing coupling between memory cells down to 5%, achieving a write speed performance of 18MB/s. In three-step writing technology, it writes through rough distribution in the second step, and tightens as well-defined distribution at the third.
Toshiba has also optimised the peripheral circuit structure of the chip, securing a 20% reduction in area from current chips, an achievement that significantly contributed to the 170mm2 die size, the smallest yet achieved at this density.
Toshiba and SanDisk have maintained their continuing leadership in the development and manufacture of advanced NAND flash memory. Toshiba will promote further development in leading-edge process technologies to further widen the scope of application and to expand the NAND flash memory market.