Microsemi unveils highest density timing devices for wireless infrastructure and backhaul applications

Microsemi Corporation has launched a new highest density family of single-chip timing card devices with support for both Synchronous Ethernet (SyncE) and IEEE 1588-2008 packet networks including 4G and LTE applications. The highly integrated ZL30361, ZL30362 and ZL30363 provide all of the key elements required for wireless network synchronization including support for phase and frequency. These devices are currently available and are being designed into wireless backhaul products where phase synchronization performance is crucial.

These new devices are able to provide a high level of flexibility and much smaller footprints (13mm x 13mm) compared to other solutions currently available on the market, according to the company. Key features include the availability of up to four independent timing channels; each channel can be configured to support any electrical or packet mode of operation. This allows for the simultaneous support for GPS, SyncE and IEEE1588-2008 timing. As a result, these devices can be used to enhance or to replace GPS timing in wireless infrastructure at a lower cost.

“Our new SyncE/IEEE1588 solutions provide customers with a highly compelling value proposition and very flexible architecture as evidenced by several product design-ins already in development by leading telecom companies,” said Maamoun Seido, vice president of Microsemi’s Timing Products group.

SyncE and IEEE 1588-2008 technologies allow carriers to improve synchronization and performance in packet-switching networks including the fast-growing 4G and LTE segment, which, according to a report from market research firm Infonetics, is rising from $8 billion in 2012 to a forecasted $17 billion in 2016.

The SyncE/IEEE1588 timing solutions feature multiple digital phase locked loops (DPLL) tailored for wireless infrastructure and mobile backhaul networks. The ZL30362 has four highly programmable multi-function DPLLs, coupled with four independent synthesizers capable of generating multiple independent frequencies to directly drive both 1 Gigabit Ethernet (GbE) and 10GbE physical layers (PHYs). The ZL30361 and ZL30363 timing card devices feature single and dual multi-function DPLLs, coupled with three and four high performance synthesizers, respectively.

The ZL30361, ZL30362 and ZL30363 are based on Microsemi’s two stage ClockCenter architecture which supports any rate-to-any rate frequency translation from 1Hz to 750MHz, including GPS 1 pulse per second (pps) input. Microsemi has added standards-compliant IEEE 1588-2008 protocol with Clock Recovery Servo to the devices, which are Microsemi’s third-generation packet timing solution.

The ZL30362 is the only timing device currently available that meets the requirement of at least three independent timing channels to efficiently support the emerging boundary clock standard. Support for Slave Only Ordinary Clock, Ordinary Clock and Boundary Clock is also offered with a focus on phase performance for rapidly growing LTE and LTE-A markets. Microsemi has proven performance down to 200ns over G.8261 networks and down to 100ns over for boundary clock networks using G.8261 test conditions.

To future-proof designs, new standards such as the upcoming telecom profile for Phase will be supported through a simple software upgrade. The standards-compliant timing card devices have also passed interoperability testing at the ISPCS interoperability conference. Each device can also lock to four separate IEEE1588 Grand Masters and provide hitless reference switching between them or any electrical reference.

With jitter capable of driving both 1G and 10GbE PHYs directly there is no need for expensive jitter attenuators. The packaging used by Microsemi offers a 50 percent smaller footprint than competitor solutions and combines this with significant power savings, a key element in today’s drive for “green” focused equipment.



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