CIE Components in Electronics
Cadence Design Systems and NextG-Com, a specialist in embedded software products and services for LTE, M2M and satellite communications, have announced that NextG-Com has completed its port of the ALPS520 LTE Layer 2 and 3 protocol to the Cadence Tensilica ConnX BSP3 processor core. This combined hardware/software solution can be used to speed the design of LTE modems for cellular phones, tablets and other end-user equipment.
The NextG-Com ALPS520 LTE protocol stack implements Layers 2 and 3 for FDD and TDD User Equipment (UE) terminals compliant to 3GPP Release 11. The ALPS520 is fully tested against 3GPP 36.523 conformance tests. The protocol stack components also come with a host of tools (Trace, ASN.1, SE-RTOSTM), which aid in faster product development.
The ConnX BSP3 core is an optimised LTE Layer 1, 2 and 3 dataplane processor (DPU), ideal for system control and layers 2 and 3 protocol stacks. This core, coupled with the ConnX BBE DSP cores and the ConnX SSP16DPU, enables SoC developers to quickly implement software-programmable wireless communication modems.
“The NextG-Com team has developed a modular architecture protocol stack, leveraging the enhanced features of the BSP3, which is optimized for the low-level bit manipulation typical of L1 and L2 functionality,” stated Eric Dewannain, Cadence’s senior group director of baseband products. “Together with NextG-Com we can offer customers a total solution for fast implementation of LTE mobile devices.”
“The Tensilica ConnX BSP3 core offers a very small size and low-power implementation for LTE Layers 1, 2 and 3 for UE modem designs,” stated Denis Bidinost, CEO, NextG-Com. “Given Cadence’s great success in LTE designs, we are very excited about this partnership. Our roadmap for 3GPP Release 12 support and onwards is intended to enable both companies to continue to work together in the future.”
