First FPGA device, using 80 GTH serial transceivers, breaks the 2 Tbps bandwidth barrier

These devices have been designed to enable fast, scalable and easy-to-implement chip-to-chip serial interfaces, robust 10GBASE-KR backplanes that maximize bandwidth while supporting the various board-to-board distances of next-generation communication systems, and high signal-integrity interfaces to the latest optical modules validated to support cable distances of up to 80km.

Customers who need greater system capacity and bandwidth can migrate to the Virtex-7 X1140T FPGA, built using 3D Stacked Silicon Interconnect technology on the 7 series FPGA scalable optimised architecture.  Shipments of footprint-compatible Virtex-7 X1140T FPGAs with 96 GTH transceivers will follow in May.

“Xilinx has taken its years of experience in serial transceivers and combined that with the innovative low power, 28nm 7 series FPGA architecture to deliver a highly optimised family for the Wired Communication marketplace,” said Tim Erjavec, senior director of FPGA platforms at Xilinx. “Customers can confidently implement their designs starting with Virtex-7 X690T FPGAs and move up to larger FPGAs that provide the market-optimised ratio of resources when higher integration is required.”

By 2015, data crossing the global IP network is expected to surpass the zettabyte threshold, representing a 32 percent compound annual growth rate (CAGR) over 2010 levels. In particular, demand for IP-based video services continues to see exponential growth and has become a driving force in the development of next-generation Layer 2 network switch equipment that achieves the low latency and improved Quality of Service (QoS) capabilities needed to satisfy this demand. 

To deliver high definition video on demand directly to the home, equipment manufacturers serving cable operators are tasked with developing next-generation EdgeQAM equipment that is cost effective, maximizes power efficiency and is able to support for full spectrum switched digital video.

“As consumers demand more narrowcast services from cable companies, equipment manufacturers are faced with the challenge of providing future-proof solutions that adapt to emerging standards that are constantly evolving,” said Ross Q. Smith, CEO at RADX Technologies, Inc. “The EdgeQAM solution being developed by Xilinx and RADX benefit from the compatibility, flexibility and density of the Virtex-7 X690T FPGA to provide systems that substantially increase QAM channel density while staying inside existing power envelopes.”

The Virtex-7 X690T and X1140T FPGAs provide the most processing capacity and bandwidth per watt of any FPGA to implement advanced Packet Processing, FEC, Quality-of-Service, Switching, and Traffic Management algorithms as well as next generation EdgeQAM implementations.

Engineers will be able design using the most advanced dynamically controllable GTH serial transceivers that include fully programmable three-tap FIRs that enable the transmitter de-emphasis needed to deal with the widest range of environments, along with fully-adapting seven fixed and four sliding tap receiver Decision Feedback Equalization (DFE) circuits – the most DFE taps in the industry – to ensure the greatest margin over different topologies.  To accelerate design and debugging, each GTH transceiver also includes a non-destructive, high-resolution 2D eye scan circuit that allows designers to see and measure the receiver eye from within the FPGA. With 80 GTH transceivers that run up to 13.1 Gbps, the Virtex-7 X690T FPGA is first FPGA to break the 2 Tbps single FPGA device bandwidth barrier. By leveraging the advanced 7 series FPGA architecture built on the TSMC 28HPL process, customers can save greater than 25 percent total power over competing similar-density FPGAs, allowing them to achieve the integration they need to build next-generation systems that achieve performance and low power requirements. 

Xilinx

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