Altera unveils Generation 10 FPGAs and SoCs raising both performance and power efficency

Altera Corporation has introduced its Generation 10 FPGAs and SoCs (system-on-chip), offering system developers improved levels of performance and greater power efficiencies. Generation 10 devices use a process technology and architecture to deliver what the company claims is the industry’s highest performance and highest levels of system integration while using less power. Initial Generation 10 families include Arria 10 and Stratix 10 FPGAs and SoCs with embedded processors.

Generation 10 devices leverage advanced process technologies, including Intel’s 14-nm Tri-Gate process and TSMC’s 20 nm process. Early access customers are currently using the Quartus II software for Generation 10 product development.

“Our Generation 10 products will strengthen the penetration of programmable logic into new markets and applications and further accelerate the implementation of FPGAs into sockets traditionally served by ASSPs and ASICs,” said Patrick Dorsey, senior director of product marketing at Altera. “The optimisations we made in our Generation 10 devices allow customers to develop highly customised solutions that dramatically increase system performance and system integration while lowering operating expenses.”

Stratix 10 FPGAs and SoCs are designed for use in applications in the networking, communications, broadcast and compute and storage markets. Leveraging Intel’s 14 nm Tri-Gate process and an enhanced high-performance architecture, Stratix 10 FPGAs and SoCs have an operating frequency over one gigahertz, 2X the core performance of current high-end 28-nm FPGAs. For high-performance systems they operate with very strict power budgets, Stratix 10 devices allow customers to achieve up to a 70 percent reduction in power consumption at performance levels equivalent to the previous generation.

Stratix 10 FPGAs and SoCs are part of the Generation 10 portfolio introduction and further details on the product will be released at a later date.

Stratix 10 FPGAs and SoCs provide: over four million logic elements on a single die; 56-Gbps transceivers; over 10-TeraFLOPs single-precision digital signal processing; a third-generation ultra-high-performance processor system and multi-die 3D solutions capable of integrating SRAM, DRAM and ASICs.

Arria 10 FPGAs and SoCs are the first device families to roll out as part of the Generation 10 portfolio. Altera believes the device family sets a new bar for midrange programmable devices, delivering both the performance and capabilities of current high-end FPGAs at the lowest midrange power. Leveraging an enhanced architecture that is optimised for TSMC’s 20 nm process, Arria 10 FPGAs and SoCs deliver higher performance at up to 40 percent lower power compared to the previous device family.

Arria 10 devices offer more features and capabilities than today’s current high-end FPGAs, at 15 percent higher performance. Reflecting the trend toward silicon convergence, Arria 10 FPGAs and SoCs offer the highest degree of system integration available in midrange devices, including 1.15 million logic elements (LEs), integrated hard IP and a second-generation processor system that features a 1.5 GHz dual-core ARM Cortex-A9 processor. Arria 10 FPGAs and SoCs also provide 4X greater bandwidth compared to the current generation, including 28-Gbps transceivers, and 3X higher system performance, including 2666 Mbps DDR4 support and up to 15-Gbps Hybrid Memory Cube support.

Generation 10 devices are supported by Altera’s Quartus II development software and tools for higher level design flows that include an OpenCL Software Development Kit (SDK), SoC Embedded Design Suite (EDS) and DSP Builder.

Initial samples of Arria 10 devices will be available in early 2014. Altera will have 14 nm Stratix 10 FPGA test chips in 2013 and Quartus II software support for Stratix 10 FPGAs and SoCs in 2014.


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