RSS
SpringSoft rolls out advanced technology platform for Certitude Functional Qualification system
Published:  12 May, 2011

SpringSoft has announced a number of new enhancements to its Certitude Functional Qualification System that will enable broader and more efficient deployment of verification qualification methodologies. Among the new innovations are detection automation and checker qualification capabilities that will enable quicker identification of potential problems in chip verification environments and will support continuous improvements throughout the verification flow.

Functional verification is the process of confirming that chip design implementations function as specified. Certitude software is the only commercial tool, currently available,  to objectively qualify the checking mechanisms and stimuli (tests) used for functional verification of IP modules and system-on-chip (SoC) designs. Expansion of the Certitude technology platform is aimed at checking critical functionality earlier and more frequently to ensure with a high level of confidence that verification environments are ‘sign-off’ quality.

According to George Bakewell, director of product marketing at SpringSoft “These new automation technologies and infrastructure improvements mean that Certitude will provide meaningful information faster on the quality of chip verification environments, so engineers can prioritise their efforts and more effectively utilise system resources. More importantly, we’re also extending the use model for functional qualification to earlier in the verification flow, and not just a point tool used at the end of the process, to help SoC teams get to signoff sooner with higher quality designs.”

The Certitude software combines patented automation technology with mutation-based techniques and static analysis to measure effectiveness, identify significant weaknesses, and improve the quality of results for HDL simulation-based verification. In simple terms, the system injects faults (artificial mutations) into the register transfer level (RTL) version of designs and runs tests against each fault using the engineer’s digital logic simulator of choice. The results provide detailed information on activation, propagation, and error detection capabilities to assess overall verification progress and to find and fix holes, such as missing functional checks, incomplete test scenarios, and infrastructure problems. Analysis of faults that don't propagate or are not detected by the verification environment points to specific problems in the stimuli, observability or checkers with feedback to help correct them.

New fault detection, ranking and tracking functions have been added to the Certitude technology platform to provide important feedback faster, refine results, and simplify fault analysis throughout the verification flow. When the Certitude system finds a non-detected (ND) fault, it automatically drops other faults related to that ND fault so as to not waste valuable cycle time. The system now allows fault dropping with an extended logic cone approach that expands the dropping criteria beyond a single cone to further minimise the ‘noise’ factor. Engineers can find high priority ND faults much faster. The new fault ranking and prioritisation capabilities offer guidance on which ND faults within a specific fault class to analyze first and which test to use for investigation. Test cases for a given ND fault are automatically ranked based on their impact on the output when propagated.

When enough important results are found, the Certitude system automatically stops so engineers can incrementally analyse, fix and eliminate problems. This detection auto stop feature relies on predefined criteria, such as prioritised fault classes and ND faults within a class, to define a reasonable stopping point based on verification goals.

As part of its Certitude platform expansion, SpringSoft will also introduce a new mode for deployment early in the verification process to measure how well the environment detects unspecified behaviour. In most SoC verification environments, the checker infrastructure is typically in place before all the tests are written. The new mode is designed to generate fast results with less simulation resources in order to provide early indicators of checker effectiveness and reveal problems, such as incorrect or missing checkers. In addition, SpringSoft’s product roadmap will extend further the range of Certitude applications in an effort to make functional verification sign-off more complete. Development efforts include areas such as improved application at the SoC level and enhanced assertion support.

 




COPYRIGHT © Specialist Business Media Limited- 2012

All content within the Components in Electronics web site is protected by the UK copyright of Specialist Business Media Limited. Copyright law prohibits copying, repurposing, re-transmitting or re-distributing of any material on this site, without the prior permission of the copyright owner. All rights reserved.