The TL3211 combines performance, power efficiency, user flexibility, and a small memory footprint to meet the requirements of 2G/3G modems and advanced audio processing, including fully-certified HD audio codecs from Dolby and DTS. The new core has already been adopted by a Tier-1 semiconductor vendor.

The new processor is compliant and code compatible with the CEVA-TeakLite-III architecture. It is a 32-bit audio DSP running at 1GHz with a silicon footprint of only 0.2mm² when implemented on a 40nm process node. Specifically benefitting the DTV and STB markets, the processor runs a complete DTV use-case in less than 200 MHz, leaving ample headroom for vendors to run various post-processing functions on the same core, thereby reducing overall cost. For low cost smartphones, it allows an efficient integration of baseband processing with application processing related needs like HD audio, and voice enhancements such as noise cancellation and beam forming.

The CEVA-TL3211 core is fully backwards compatible with earlier CEVA-TeakLite families, including CEVA-TeakLite, CEVA-TeakLite-II, CEVA-Teak and the CEVA-TL3210, thereby allowing licensees of these cores to easily reuse their existing code. The processor further reduces development time through its fully cached memory subsystem and CEVA’s production-proven application optimizer and software development environment.

“The new CEVA-TL3211 extends our deployed DSP architecture, with more than 100 design wins, 1.5 billion devices shipped to-date and more than 90 fully optimised audio and voice codecs. We have leveraged our production-proven CEVA-TeakLite-III DSP architecture for the specific needs of next-generation audio and voice applications, such as DTVs, STBs and smartphones, providing a powerful audio and voice processor," said Eran Briman, vice president of marketing at CEVA. “We have a track record of working with leaders in audio technology, and our innovative features such as the solution’s power scaling unit, its efficient memory utilisation and its substantial audio processing capabilities allow product designers to meet their market requirements faster and with lower risk.”

 

The CEVA-TL3211 audio processor features native 32-bit processing, including a single-cycle 32x32-bit multiplier, a 32-bit register file, 64-bit wide memory bandwidth, 72-bit accumulation for wide dynamic range, as well as efficient bit-manipulation capabilities. In addition to supporting up to three instructions running in parallel, the CEVA-TL3211 also supports single-precision and double-precision FFT instructions for efficient codec implementations.

It also includes a memory subsystem, supporting the use of code cache memory, 2-way set associative data cache memory, configurable cache and TCM sizes and user selectable write policy. The cached memory subsystem further supports automatic pre-fetch for increased efficiency, the use of a level 2 system cache, and non-blocking transactions.

The CEVA-TL3211 is coupled with a set of optimised audio and voice codecs, available as part of the CEVA-HD-Audio solution. This single-core solution is the most compact and power-efficient HD audio offering available for integration into home entertainment and consumer ICs, with lower overall cost and reduced die size compared to other audio solutions, some requiring dual processors for advanced audio use-cases such as Blu-ray Disc.

In addition to a host of mainstream codecs like MP3, AAC, HE-AAC, WMA, WMA Pro, and RealAudio, the CEVA-TeakLite-III architecture is supported by a suite of fully-certified HD-Audio codecs that are available directly from CEVA.

The CEVA-TL3211 core and CEVA-HD-Audio solution are currently available for licensing.